/******************************************************************************
 *                  Shanghai ChipON Micro-Electronic Co.,Ltd
 ******************************************************************************
 *  @File Name        : kf8a100fxx_adc.h
 *  @Author           : ChipON AE/FAE Group
 *  @Date             : 2023-12-19
 *  @HW Version       : KF8A100Fxx
 *  @Lib Version      : V2.0.1
 *  @Description      : This file provides the driver for the adc module
 ******************************************************************************
 *  Copyright (C) by Shanghai ChipON Micro-Electronic Co.,Ltd
 *  All rights reserved.
 *
 *  This software is copyright protected and proprietary to
 *  Shanghai ChipON Micro-Electronic Co.,Ltd.
 *****************************************************************************/
/******************************************************************************
 *  |Date        |Version  |Author       |Description
 ******************************************************************************
 *  |2023-12-26  |V2.0     |Wang Junxiong|New creat
 *****************************************************************************/

#ifndef KF8A100FXX_ADC_H
#define KF8A100FXX_ADC_H

#ifdef __cplusplus
extern "C" {
#endif

/******************************************************************************
 *                      Include Files
 *****************************************************************************/
#include "kf8a100fxx.h"
/******************************************************************************
 *                      Macro or Inline
 *****************************************************************************/

/**
 * @brief adc module disable/enable
 * 0: disable, 1:enable
 *
 */
#define ADC_ENABLE(x) (ADEN = (x))

/**
 * @brief ADC Update Channel
 * x: ADC_CH_0~ADC_CH_33, ADC_OPOUT, ADC_TS_OUT
 *
 */
#define ADC_UPDATE_CHANNEL(x) (ADCCTL2 = (uint8_t)x & 0x3fu)

/**
 * @brief adc conversion enable
 * 0: disable, 1:enable
 *
 */
#define ADC_ENABLE_CONVERSION (START = 1u)
/*****************************************************************************
 *                      Typedef Definitions
 *****************************************************************************/

/**
 * @brief ADC Data Alignment Mode
 */
typedef enum
{
    ADC_LEFT_JUSTIFIED  = 0u,
    ADC_RIGHT_JUSTIFIED = 128u
} Adc_AlignmentType;

/**
 * @brief ADC Clock Selection
 */
typedef enum
{
    ADC_SCLK_DIV2  = 0u,
    ADC_SCLK_DIV4  = 64u,
    ADC_SCLK_DIV8  = 16u,
    ADC_SCLK_DIV32 = 32u,
    ADC_SCLK_DIV16 = 80u,
    ADC_SCLK_DIV64 = 96u,
} Adc_ClkType;

/**
 * @brief ADC Reference Voltage
 */
typedef enum
{
    ADC_NONE   = 0u,
    ADC_VDD    = 4u,
    ADC_VREFIN = 8u
} Adc_VrefType;

/**
 * @brief ADC Sampling Channel
 */
typedef enum
{
    ADC_CH_0   = 0u,
    ADC_CH_1   = 1u,
    ADC_CH_2   = 2u,
    ADC_CH_3   = 3u,
    ADC_CH_4   = 4u,
    ADC_CH_5   = 5u,
    ADC_CH_6   = 6u,
    ADC_CH_7   = 7u,
    ADC_CH_8   = 8u,
    ADC_CH_9   = 9u,
    ADC_CH_10  = 10u,
    ADC_CH_11  = 11u,
    ADC_CH_12  = 12u,
    ADC_CH_13  = 13u,
    ADC_CH_14  = 14u,
    ADC_CH_15  = 15u,
    ADC_CH_16  = 16u,
    ADC_CH_17  = 17u,
    ADC_CH_18  = 18u,
    ADC_CH_19  = 19u,
    ADC_CH_20  = 20u,
    ADC_CH_21  = 21u,
    ADC_CH_22  = 22u,
    ADC_CH_23  = 23u,
    ADC_CH_24  = 24u,
    ADC_CH_25  = 25u,
    ADC_CH_26  = 26u,
    ADC_CH_27  = 27u,
    ADC_CH_28  = 28u,
    ADC_CH_29  = 29u,
    ADC_CH_30  = 30u,
    ADC_CH_31  = 31u,
    ADC_CH_32  = 32u,
    ADC_CH_33  = 33u,
    ADC_OPOUT  = 36u,
    ADC_TS_OUT = 39u
} Adc_ChannelType;
/******************************************************************************
 *                      Export Variables
 *****************************************************************************/

/******************************************************************************
 *                      Export Functions
 *****************************************************************************/

/**
 * @brief ADC Initialization
 *
 * @param Channel ADC channel
 * @param Clk Clock Selection
 * @param Vref Reference Voltage
 * @param Ali Data Alignment Mode
 */
void Adc_Init(Adc_ChannelType Channel, Adc_ClkType Clk, Adc_VrefType Vref, Adc_AlignmentType Ali);

/**
 * @brief ADC Deinitialization
 *
 */
void Adc_DeInit(void);

/**
 * @brief Enable or disable ADC
 *
 * @param State 0: disable, 1: enable
 */
void Adc_Enable(uint8_t State);

/**
 * @brief ADC Enable Conversion
 *
 */
void Adc_EnableConversion(void);

/**
 * @brief ADC single sample
 *
 * @return uint16_t ADC Sample Value
 */
uint16_t Adc_SingleSample(void);

/**
 * @brief Initialize T2 trigger ADC
 *
 * @param Period T2CCR0H, T2CCR0L
 */
void Adc_T2ccr0Enable(uint16_t Period);

/**
 * @brief Initialize T2 trigger ADC
 *
 * @param Period T2CCR1H, T2CCR1L
 */
void Adc_T2ccr1Enable(uint16_t Period);

/**
 * @brief ADC get conversion value
 *
 * @return uint16_t ADC Sample Value
 */
uint16_t Adc_GetConversionValue(void);
#ifdef __cplusplus
}
#endif

#endif
/* EOF */
